The present invention relates to a process for optically testing a circuit board or the like having conductor tracks for detecting functional faults such as shorts, conductor track interruptions and conductor track misplacement. More particularly, the present invention is directed to such a process wherein such optical testing is achieved by a computer controlled testing apparatus including at least one camera which scans the surface of the circuit board in a point-by-point manner and establishes for each point scanned an image representation indicative of a conductor track area or a non-conductor track area. These representations then are utilized to ascertain whether widths of the conductor tracks and spacings therebetween have required minimum values.
A known process of this type involves a so-called "design rule test" for testing circuit boards on a microscopic scale to determine the dimensions of and the distances between the conductor tracks. In this known process, minimum acceptable values of conductor track widths and spacings to be detected initially are entered by a user into the testing apparatus which then executes the test. More particularly, the machine scans circuit boards fed to it to check the above dimensions. Such machine however does not perform any comparison with a master or reference circuit board or with any previously stored values. The test merely senses configurations of the circuit board on a local or board-by-board basis to determine whether predetermined minimum values are observed. In this design rule test, conductor track position is irrelevant.
As is known, testing is executed by a scanning procedure in which each image is divided into a plurality of image points. Video information provided in lines or arrays by a video camera is converted to analog signals and is processed to remove undesirable side effects, thereby resulting in a rastered image of the circuit board which has only black and white areas corresponding to metal or non-metal areas. The black and white information so obtained is used for comparison with predetermined minimum width values. In this manner, it may be determined whether the minimum requirements of the circuit board under test are satisfied.
One disadvantage of this design rule process is that it cannot detect, for instance, the presence of incorrectly printed circuit boards since the test is conducted regardless of the pattern of the conductor track on an individual circuit board. Thus, regardless of the particular manner in which the conductor tracks are laid out, testing is concerned only with whether the test object corresponds to predetermined design rules, i.e. minimum spacings, minimum widths. At most, the circuit board under test may be inspected for the presence of geometric shapes which are not permissible, such as conductor tracks extending at acute angles.
Another disadvantage of this known process is that it fails in situations in which deficient circuit processing during manufacture results in a pattern which is faulty, yet which satisfies the predetermined design rule, i.e. minimum spacing, minimum width. For example, this known process may accept undesirable conductor track interruptions as long as the dimensions of such interruptions correspond to predetermined and permissible conductor track spacing values. Because of component loss during component placement and of faulty function of assembled circuit boards, failure to recognize faults of this type may result in substantial expense once a circuit board of this type is placed into use.
To exclude the possibility of the occurrence of such faults, a bit-by-bit comparison may be conducted, employing reference circuit boards. Even if comparison is made using a coarser grid or raster, such as a 4:1 reduction, the amount of data to be processed would be immense. Accordingly, a bit-by-bit comparison with a reference circuit board is hardly practicable.